In many digital communication systems, a reference clock may be used to sample data signals at fixed intervals. A low frequency reference clock can be generated using a crystal oscillator. However, because such crystals are typically not available for high frequency applications, a phase-locked loop (PLL) may be used to produce a high frequency periodic signal. Such a PLL may receive a low frequency reference signal and then gain or multiply the frequency to a desired value or oscillation output. In a typical PLL design, a voltage-controlled oscillator (VCO) may be used to produce a high frequency periodic signal. Further, an LC tank circuit may be used as a frequency controlling element in the VCO (LCVCO), using variable capacitors (e.g., varactors) that change capacitance values based on a control voltage applied thereto.
However, an integrated LCVCO's center frequency may vary significantly (e.g., 10-15%) with process variations. Accordingly, a large “pulling range,” or the maximum change in output frequency that can be attained via an applied control voltage, may be required to compensate for the center frequency variation. Further, the changing capacitance of the LC tank may cause associated variations in the loading conditions of the circuit. As a result, different amounts of energy may be needed to guarantee oscillation for different bias conditions.
In many conventional LCVCO designs, in order to guarantee oscillation, an amount of energy sufficient to ensure oscillation under all process conditions is generally supplied to the circuit. In this approach, it is very difficult to determine a precise amount of energy necessary for oscillation. Accordingly, a designer will typically supply more energy than a minimum necessary amount in order to guarantee oscillation for all appropriate process conditions. Undesirably, power may thus be wasted because the VCO may take more power than necessary for oscillation at certain process conditions. Also due to the excess energy supplied, the amplitude of oscillation can be relatively large at process corners where excess energy is not needed. Such a large amplitude can give rise to other design considerations, such as ensuring that devices in the circuit do not become overly stressed due to excessive voltage conditions provided by the LC tank circuit. On the other hand, if not enough energy is supplied, under some process, voltage and temperature (PVT) conditions, the LCVCO may have a very small amplitude of oscillation, or the circuit may not even oscillate at all. No oscillation is clearly an undesirable condition. Also undesirable is a relatively small amplitude of oscillation because noise in the circuit can have a relatively large effect on associated oscillator jitter performance.
What is needed is an amplitude regulation approach suitable for an LCVCO circuit. Further, what is needed is an approach that reduces or minimizes the amount of energy that such an LCVCO circuit uses in typical operations. The meeting of such needs may provide further benefits, such as overcoming operational variations due to process, temperature, and parasitics (e.g., those added to the circuit during the integration process) in an LCVCO or other oscillator circuit design.